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quad 2-input multiplexer

the aip74hc/hct157 are quad 2-input multiplexers which select 4 bits of data from two sources under the control of a common data select input (s). the enable input (e) is active low. whene is high, all of the outputs (1y to 4y) are forced low regardless of all other input conditions.

moving the data from two groups of registers to four common output buses is a common use of the aip74hc/hct157. the state of the common data select input (s) determines the particular register from which the data comes. it can also be used as function generator. the device is useful for implementing highly irregular logic by generating any four of the 16 different functions of two variables with one variable common. the aip74hc/hct157 is logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to s.

the logic equations are:

1y=e()× (1i1×s 1i0×s())

2y=e()× (2i1×s 2i0×s())

3y=e()× (3i1×s 3i0×s())

4y=e()× (4i1×s 4i0×s())

the aip74hc/hct157 is identical to the aip74hc/hct158 but has non-inverting (true) outputs.

  • main features product

  • product documents

  • input levels:

    for aip74hc157: cmos level

    for aip74hct157: ttl level

  • low-power dissipation

  • non-inverting data path

  • specified from -40℃ to 105℃

  • packaging information: dip16/sop16/tssop16

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