cd4060 is a 14-stage ripple-carry binary counter/divider and oscillator with three oscillator terminals (rs, rext and cext), ten buffered outputs (q3 to q9 and q11 to q13) and an overriding asynchronous master reset input (mr).
the oscillator configuration allows design of either rc or crystal oscillator circuits. the oscillator may be replaced by an external clock signal at input rs. the counter advances on the negative-going transition of rs. a high level on mr resets the counter (q3 to q9 and q11 to q13=low), independent of other input conditions.
it operates over a recommended vdd power supply range of 3v to 15v referenced to vss (usually ground). unused inputs must be connected to vdd, vss, or another input.
wide supply voltage range from 3v to 15v
tolerant of slow clock rise and fall times
fully static operation
5v, 10v, and 15v parametric ratings
standardized symmetrical output characteristics
inputs and outputs are protected against electrostatic effects
specified from -40℃ to 105℃
packaging information: dip16/sop16/tssop16