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aip74hc/hct374
octal d-type flip-flop; positive edge-trigger; 3-state

the aip74hc/hct374 is an octal positive-edge triggered d-type flip-flop with 3-state outputs. the device features a clock (cp) and output enable (oe()) inputs. the flip-flops will store the state of their individual d-inputs that meet the set-up and hold time requirements on the low-to-high clock (cp) transition. a high onoe() causes the outputs to assume a high-impedance off-state. operation of theoe() input does not affect the state of the flip-flops. inputs also include clamp diodes, this enables the use of current limiting resistors to interface inputs to voltages in excess of vcc.

the aip74hct374 features reduced input threshold levels to allow interfacing to ttl logic levels.


  • main features product

  • product documents

  • input levels:

    for aip74hc374: cmos level

    for aip74hct374: ttl level

  • octal bus interface

  • non-inverting 3-state outputs

  • 8-bit positive, edge-triggered register

  • common 3-state output enable input

  • independent register and 3-state buffer operation

  • specified from -40℃ to 105℃

  • packaging information: dip20/sop20/tssop20


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