the aip74lvc/lvch4t774 is a 4-bit, dual supply transceiver that enables bidirectional level translation. it features eight 1-bit input-output ports (an and bn), four direction control inputs (dir1, dir2, dir3 and dir4), an output enable input ( ) and dual supply pins (vcc(a) and vcc(b)). both vcc(a) and vcc(b) can be supplied at any voltage between 1.2v and 5.5v making the device suitable for translating between any of the low voltage nodes (1.2v, 1.5v, 1.8v, 2.5v, 3.3v, 5v). pins an, and dirn are referenced to vcc(a) and pins bn are referenced to vcc(b). a high on dirn allows transmission from an to bn and a low on dirn allows transmission from bn to an. the output enable input ( ) can be used to disable the outputs so the buses are effectively isolated.
the device is fully specified for partial power-down applications using ioff. the ioff circuitry disables the output, preventing any damaging backflow current through the device when it is powered down. in suspend mode when either vcc(a) or vcc(b) are at gnd level, both an and bn are in the high-impedance off-state.
active bus hold circuitry in the aip74lvch4t774 holds unused or floating data inputs at a valid logic level.